2020 Lectures EduPort Timetable Scoring/Mail Syllabus

Class#2001 Introduction to Information Science and Engineering Submit report Scoring

Objectives We learn, from a higher viewpoint, how the world's state-of-the-art technologies are making progress or integrating in information science and engineering, and what new scientific technologies are expected to emerge, etc.
Activities We teach students so that they master the higher viewpoint concerning information sicence and engineering as above and thereby obtain material for considering what should be chosen from 7 educational programs.
Textbook Computer Architecture A Quantitative Approach 6th Ed. ISBN:978-0128119068
Introduction to Algorithms (Third Edition) ISBN:978-0262033848
Python Tutorial(https://docs.python.org/3/tutorial/)
OHM大学テキスト コンピュータアーキテクチャ ISBN:978-4-274-21253-6(電子版ここ)
アルゴリズムイントロダクション第3版総合版 ISBN:978-4-7649-0408-8
Prerequisites None
Grading Minitest(12.5pt*8=100pt)
Office hour None (make an appointment by e-mail)

No. CE-CAO2016 Standard JPN textbook Title Download Description
1 CE-CAO-01
Chap.3,5 Trends of computers, basic structure of computers and programming Eng Jpn script report The trends of computers, mechanism how programs are executed on computers, the precision of floating-point operations, and efficient execution with multimedia instruction are provided.
2 CE-CAO-04
Chap.6,7 Memory hierarchy and trends of performance metrics Eng Jpn script report The mechanism of buffer overflow problem, relationship between memory hierarchy and performance, and performance metrics such as power-delay product are provided.
3-8 The rest of the lectures Visit Syllabus in NAIST
自習 CE-CAO-01 Chap.3 Basic structure of computers and programming Eng Jpn How do computers execute programs?
自習 CE-CAO-0301 Chap.3 Programing language and instruction sets Eng Jpn Instruction set architecture
自習 CE-CAO-0302 Chap.5 High-performance media processing and VLIW Eng Jpn How can we use multimedia instructions?
自習 CE-CAO-0303 Chap.6 Memory-space, stack and buffer overflow Eng Jpn Why your computers are easily hacked?
自習 CE-CAO-04 Chap.7 Performance evaluation Eng Jpn What is Energy-Delay-Product(EDP)?
自習 CE-CAO-0501 Chap.1 Expression of information Eng Jpn Circuit
自習 CE-CAO-0502 Chap.5 Floating-point operations Eng Jpn Do you know pitfalls in floating-point operations?
自習 CE-CAO-0701 Chap.2 Memory Eng Jpn Circuit
自習 CE-CAO-0702 Chap.7 Cache memory and execution speed of programs Eng Jpn Why your programs run so slow?
自習 CE-CAO-0703 Chap.12 Memory hierarchy and virtualization Eng Jpn Memory
自習 CE-CAO-08 Chap.13 I/O device and interruption Eng Jpn OS
自習 CE-CAO-09 Chap.10 I/O device and file system Eng Jpn OS
自習 APDX03 Chap.11 Process control and inter-process communication Jpn OS
自習 APDX04 Chap.11 Deadlock and avoidance Jpn OS
発展 APDX06 Chap.14 Structure of virtual machines Jpn The magic of virtual machines: why many OS can run on single hardware?

Class#4092 High Performance Computing Platforms Submit report Scoring

Objectives Now, semiconductor miniaturization has been stopped. It is difficult to expect further performance improvements and power efficiency on CPUs / GPUs that "simulate" programming languages with machine language instructions. You can learn promising high-speed technologies and low-power technologies while learning conventional high-speed technologies. Not only students who want to become hardware engineers / researchers, but also students who want to become software engineer / researcher aiming at higher performance and low power computing infrastructures can study program execution methods from various view points.
Activities The knowledge on ILP(Instruction Level Parallelism), DLP(Data Level Parallelism), TLP(Thread Level Parallelism), DSA(Domain Specific Architecture), approximate computing units(Analog Calculation Unit, Stochastic Computing Unit), and Implementation on Machine Learning are provided step by step.
ILP(スーパスカラ,VLIW),DLP(ベクトル演算機構,GPU),TLP(共有メモリ,分散メモリ),DSA(FPGA,Systolic Array),approximate computing units(Analog Calculation Unit, Stochastic Computing Unit),機械学習向け実装方法について順に学ぶ。
Textbook Computer Architecture A Quantitative Approach ISBN:978-0128119051
Computer Organization and Design ISBN:978-0-12-407726-3
Embedded Computing A VLIW Approach to Architecture, Compilers, and Tools ISBN1-55860-766-8
Design for Embedded Image Processing on FPGAs ISBN: 9780470828496
OHM大学テキスト コンピュータアーキテクチャ ISBN:978-4-274-21253-6(電子版ここ)
Prerequisites None
Grading Minitest(12.5pt*8=100pt)
Office hour None (make an appointment by e-mail)

No. CE-CAO2016 Standard JPN textbook Title Download Description
1 CE-CAO-0604 ILP Nakashima Chap.8 Superscalar and VLIW Eng Jpn report Computrers have tradeoffs between compatibility and complexity.
2 CE-CAO-1001 DLP Nakashima Chap.9 Vector accelerator and GPU Eng Jpn report How can we get ultimate performance in large-scale computations?
3 CE-CAO-1002 FPGA Nakashima Chap.9 FPGA Eng Jpn report How can we manage huge number of calclation?
4 CE-CAO-1003 DSA Nakashima Chap.9 DSA Eng Jpn report Systolic Array Applications
Systolic Arrayアプリケーション
5 CE-CAO-11 TLP Nakashima Chap.15 Multicores and Distributed memory system Eng Jpn report The pros and cons of distributed-memory systems and shared-memory systems
6 CE-CAO-xx ACU Zhang -- Analog Computing Eng report
What is analog cmoputing?
7 CE-CAO-xx SCU Zhang -- Stochastic Computing Eng report
What is stochastic computing?
Stochastic Computingとは
8 CE-CAO-xx ML Zhang -- Analog Computing Implementations in Machine Learning Eng report
How to implement for ML
自習 CE-CAO-02 -- Simulation and emulation Eng Jpn How can we validate architecture?
自習 CE-CAO-0601 Chap.2 ALU Jpn Circuit
自習 CE-CAO-0602 Chap.4 The basics of pipelined execution Eng Jpn Why computers can execute instructions every cycle?
自習 CE-CAO-0603 Chap.7 Prediction and speculation Eng Jpn Computations can be predicted and then speculated.
自習 APDX01 -- Boolean algebra and basic logic circuits Eng Jpn Circuit
自習 APDX02 -- Sequential logic circuit Jpn Circuit
発展 APDX05 -- Region-reuse and speculation Jpn Advanced speculation
発展 APDX07 -- High performance JAVA-VM Jpn Advanced speculation

Class#5001 PBL A1-1 Digital Accelerators by Nakashima

Title Understanding the internal operation of the V1+CNN+FC model and mapping on super-efficient architecture
Activities The students can understand the internal operation of the image recognition model written in C language, and perform mapping and implementation on the Domain Specific Architecture (DSA) which is becoming one of computing platforms beyond CPU and GPGPU. The principle of operation of DSA including non-Neumann computers will help combining algorithms and special hardwares with no von Neumann bottleneck.
全てC言語により記述された画像認識モデルの内部動作を理解し,進化が止まったCPU やGPGPUの先を目指す計算基盤として広まりつつあるDomain Specific Architecture (DSA)への写像と実装を行う.GPGPUを凌駕する効率を得られる動作原理を理解し,様々な非ノイマン型計算機によりアプリケーションを実装していく明確なイメージを獲得 する.
Tools RSIM … V1+CNN+FC model simulator
IMAX … DSA with 40x64x4=10240 parallelism and compiler
ALVEO … XILINX high-level synthesis accelerator
Textbook PBL1.ppsx

Class#5002 PBL A1-2 Analog Accelerators by Zhang

Title Design and Evaluation of Re-configurable Analog Approximate Computing Units
Activities This project aims at developing novel computing architectures on the basis of single-wire-driving data representations. As a promising candidate of next generation for high performance computing, analog approximate computing units are implemented. At the end of semiconductor scaling-down, the efforts from this project are expected to achieve high efficiency for general purpose. Escaping from the conventional binary presentations and deductive computations, the hardware implementing approximate computations is developed through machine learning technologies such as regression and statistics, which are powered by some novel algorithms and circuit elements.
Tools HSPICE, C++, necessary technology libraries
Textbook will be provided