発表論文一覧 2014年(2014年1月-2014年12月)

・竹内昌平, 高前田(山崎)伸也, 姚駿, 中島康彦: "次世代アプリケーションのための包括的なアーキテクチャ探索環境の検討", 信学技報CPSY2014-89, pp.25-27, Dec. (2014)
・枝元正寛, 高前田伸也, 姚駿, 中島康彦: "データムービングボトルネックを解決するためのインテリジェントメモリシステムの検討", 信学技報CPSY2014-91, pp.31-33, Dec. (2014)
・平野竜洋, 高前田伸也, 姚駿, 中島康彦: "Triangle Countingのための大規模グラフ分割手法", 信学技報CPSY2014-73, pp.7-12, Nov. (2014)
・紅林修斗, 高前田伸也, 姚駿, 中島康彦: "最短経路探索の並列化と各種プラットホームによる性能比較", 信学技報CPSY2014-74, pp.13-18, Nov. (2014)
・清水怜, 田ノ元正和, 高前田(山崎)伸也, 姚駿, 中島康彦: "メモリネットワークベースアクセラレータの試作と評価", 信学技報CPSY2014-81, pp.51-56, Nov. (2014)
・田ノ元正和, 高前田(山崎)伸也, 姚駿, 中島康彦: "メモリネットワークベースアクセラレータを用いた畳み込みニューラルネットワーク処理", 信学技報CPSY2014-82, pp.57-62, Nov. (2014)
◆Jun Yao, Mitsutoshi Saito, Shogo Okada, Kazutoshi Kobayashi, and Yasuhiko Nakashima: "EReLA: a Low-Power Reliable Coarse-Grained Reconfigurable Architecture Processor and Its Irradiation Tests", IEEE Transactions on Nuclear Science, Vol.61, No.6, pp.3250-3257, DOI=10.1109/TNS.2014.2367541, Dec. (2014)
◆Jun Yao, Yasuhiko Nakashima, Mitsutoshi Saito, Yohei Hazama, Ryosuke Yamanaka: "A Flexible, Self-Tuning, Fault-Tolerant Functional Unit Array Processor", IEEE Micro, pp.54-63, Issue 6, Nov.-Dec. (2014)
◆Takanori TSUMURA, Yuuki SHIBATA, Kazutaka KAMIMURA, Tomoaki TSUMURA, Yasuhiko NAKASHIMA: "Hinting for Auto-Memoization Processor based on Static Binary Analysis", Proc. 2nd Int'l Workshop on Computer Systems and Architectures (CSA'14), held in conjunction with CANDAR'14, Shizuoka, Japan, pp.426-432, Dec. (2014)
◆Yoshikazu Inagaki, Shinya Takamaeda-Yamazaki, Jun Yao, Yasuhiko Nakashima: "Performance Evaluation of a 3D-Stencil Library for Distributed Memory Array Accelerators", Proc. 2nd Int'l Workshop on Computer Systems and Architectures (CSA'14), held in conjunction with CANDAR'14, Shizuoka, Japan, pp.388-393, Dec. (2014)
◆Yuuki Shibata, Takanori Tsumura, Tomoaki Tsumura and Yasuhiko Nakashima: "An Implementation of Auto-Memoization Mechanism on ARM-based Superscalar Processor", Proc. Int'l Symp. on System-on-Chip 2014 (SoC2014), Tampere, Finland, pp.1-8, DOI=10.1109/ISSOC.2014.6972435, Oct. (2014)
・高前田(山崎)伸也,枝元正寛,姚駿,中島康彦: "PyCoRAMを用いたグラフ処理FPGAアクセラレータ", 信学技報CPSY2014-10, pp.1-6, Jul. (2014)
・清水怜,高前田(山崎)伸也,姚駿,中島康彦: "メモリインテンシブアレイアクセラレータを用いた高性能グラフ処理", 信学技報CPSY2014-11, pp.7-12, Jul. (2014)
・小池和正,高前田(山崎)伸也,姚駿,中島康彦: "ニューラルネットワーク処理のエラー削減に向けた命令実行手法", 信学技報CPSY2014-33, pp.137-142, Jul. (2014)
・津村高範,柴田裕貴,神村和敬,津邑公暁,中島康彦: "実行バイナリの静的解析による自動メモ化プロセッサの高速化", 情処研報, 2014-ARC-211, pp.1-9, Jul. (2014)
◆Jun YAO, Yasuhiko NAKASHIMA, Naveen DEVISETTI, Kazuhiro YOSHIMURA, Takashi NAKADA: "A Tightly Coupled General Purpose Reconfigurable Accelerator LAPP and Its Power States for HotSpot-Based Energy Reduction", IEICE Trans., Vol.E97-D, No.12, pp.3092-3100, Dec. (2014)
◆Yukihiro SASAGAWA, Jun YAO, Yasuhiko NAKASHIMA: "Understanding Variations for Better Adjusting Parallel Supplemental Redundant Executions to Tolerate Timing Faults", IEICE Trans., Vol.J97-D, No.12, pp.3083-3091, Dec. (2014)
・都築匠, 原祐子, 山下茂, 中島康彦: "PPCにおけるLUT挿入位置最適化の定量的評価", DAシンポジウム, Aug. (2014)
・Oliver Kaltstein, Takamaeda Shinya, Jun YAO, Yasuhiko Nakashima: "DIVA-EMIN: Efficient Dependability for Post-Silicon Materials", 平成24年度情報処理学会関西支部大会講演論文集, Sep. (2014)
◆Tanvir Ahmed, Jun Yao, and Yasuhiko Nakashima: "A Two-Order Increase in Robustness of Partial Redundancy Under a Radiation Stress Test by Using SDC Prediction", IEEE Transactions on Nuclear Science, Vol.61, Issue.4, pp.1567-1574, DOI=10.1109/TNS.2014.2314691, Aug. (2014)
◆Jun Yao, Mitsutoshi Saito, Shogo Okada, Kazutoshi Kobayashi, and Yasuhiko Nakashima: "EReLA: a Low-Power Reliable Coarse-Grained Reconfigurable Architecture Processor and Its Irradiation Tests"," IEEE Nuclear and Space Radiation Effects Conference 2014 (poster), Jul. (2014)
◆【IEEE Symposium on Low-Power and High-Speed Chips 2014 Featured Poster Award】Masakazu Tanomoto, Jun Yao, Yasuhiko Nakashima, Yangtong Xu, Xinliang Wang, Wei Xue: "Performance Tuning of a Global Shallow-water Atmospheric Model on Xeon Phi", IEEE Symposium on Low-Power and High-Speed Chips 2014 (poster), Apr. (2014)
◆Shuto Kurebayashi, Jun Yao, Yasuhiko Nakashima: "A Pipelined Newton-Raphson Method for Floating Point Division and Square Root on Distribted Memory CGRAs", IEEE Symposium on Low-Power and High-Speed Chips 2014 (poster), Apr. (2014)
◆Tatsuhiro Hirano, Jun Yao, Yasuhiko Nakashima: "Tuning of a Breadth First based Triangle-counting by using Multi-threading", IEEE Symposium on Low-Power and High-Speed Chips 2014 (poster), Apr. (2014)
◆Yuttakon Yuttakonkit, Jun Yao, Yasuhiko Nakashima: "A Globally Asynchronous Locally Synchronous DMR Architecture for Aggressive Low-Power Fault Toleration", IEEE Symposium on Low-Power and High-Speed Chips 2014, Apr. (2014)
◆Jun Yao, Yasuhiko Nakashima, Mitsutoshi Saito, Yohei Hazama, Ryosuke Yamanaka: "A Flexibly Fault-Tolerant FU Array Processor and its Self-Tuning Scheme to Locate Permanently Defective Unit", IEEE Symposium on Low-Power and High-Speed Chips 2014, Apr. (2014)
◆Shunichi Sanae, Yuko Hara-Azumi, Shigeru Yamashita and Yasuhiko Nakashima: "Better-than-DMR techniques for Yield Improvement", FCCM-2014, May. (2014)
・Yuttakon Yuttakonkit, Jun Yao, Yasuhiko Nakashima: "An Asynchronous Commit DMR Architecture for Aggressive Low-Power Fault Toleration", 情報処理学会研究報告. 計算機アーキテクチャ研究会報告, 2014-ARC-209(9), 1-7, Mar. (2014)
◆Shunichi Sanae, Yuko Hara-Azumi, Shigeru Yamashita, and Yasuhiko Nakashima: "Novel Area-Efficient Technique for Yield Improvement", Workshop on Design Automation for Understanding Hardware Designs, Design Automation and Test in Europe (DATE), Mar. (to be presented at Electronic) (2014)
・林大地, 藤原知広, 姚駿, 中島康彦: "演算器アレイ型アクセラレータへのメモリインテンシブなアプリケーションの写像と性能評価", 情報処理学会研究報告, 計算機アーキテクチャ研究会報告, 2014-ARC-208(17), 1-5, Jan. (2014)
・楠田浩平, 姚駿, 中島康\彦: "メモリ分散型アレイアクセラレータのための命令生成手法の開発と評価", 情報処理学会研究報告, 計算機アーキテクチャ研究会報告, 2014-ARC-208(16), 1-7, Jan. (2014)
◆Yuko HARA-AZUMI, Masaya KUNIMOTO, and Yasuhiko NAKASHIMA: "Emulator-Oriented Tiny Processors for Unreliable Post-Silicon Devices: A Case Study", ASP-DAC, 19th Asia and South Pacific Design Automation Conference, pp.85-90, Jan. (2014)